简介:近日,信息产业部以“信部科(2000)453号”文和“信部科(2000)282号”文发布了“光波分复用系统(WDM)技术要求-32x2.5Gb/S部分”、“同步数字体系(SDH)上传送IP的LAPS技术要求”、“交换机ISDN用户接口在线测试功能”、“接入网技术要求-综合数字环路载波(IDLC)”和“接入网设备测试方法-带话音分离器的不对称数字用户线(ADSL)”等5项通信行业标准。现简要介绍如下:1.“光波分复用系统(WDM)技术要求-32x2.5Gb/s部分”标准的编号为YD/T1060—2000。该标准规定了32x2.5Gb/s的WDM系统的技术要求,针对采用共享掺饵光纤放大器EDFA技术和光纤1550nm窗口的密集波分复用系统。它的目标是将来提供不同系统间的横向兼容性,目前则只能达到部分横向兼容目的。本标准给出的某些具体参数针对32通路WDM系统,如波长区划分、光接口参数等,本标准中有关光放大器和主光通道的参数适用于单方向使用增益范围为192.1THz-196.1THz的光放大器的WDM系统。本标准规范的是点到点线性WDM系统和在OADM应用于线性结构的要求,不考虑OADM设备在环网...
简介:Transmissionperformanceofelectroabsorptionmodulatorin10Gb/stransmissionsystemshasbeensimulatedandanalyzedundertheconditionoftakingintoaccountthechirp,extinctionratio,transmissivityandrise/falltime.ResultsshowthatshorttransmissiondistancewithoutEDFAafterEAMcanbeusedinfuturemetropolitanareanetwork,butthetransmissivitymustbecarefullyconsidered.Thesamplingtimerangeanddecisionlevelcanbeoptimizedtoreducethebiterrorratio.
简介:Inthispaper,anewmodelbasedonanimprovedBrentKung(BK)parallelprefixnetwork(PPN)algorithmisproposedandrealizedinthefieldprogrammablegatearray(FPGA).Thismodelisemployedintheimplementationof20Gb/sdifferentialquadraturephase-shiftkeying(DQPSK)precoderin40Gb/spolarizationdivisionmultiplex(PolDM)DQPSKsystem.Inthecomputationprocess,thecomputationcomplexity(area)optimizationwithfan-outlimitedisachieved.Intheimplementation,770FPGAsliceregistersareutilized,whichsaveabout60%logicresourcescomparedwiththepreviousKoggeStone(KS)algorithm.
简介:Anexperimentofadaptivepolarizationmodedispersion(PMD)compensationfor40-Gb/sreturn-to-zero(RZ)opticalcommunicationsystemisreported.Intheexperiment,degreeofpolarization(DOP)isusedasfeedbacksignalandparticleswarmoptimization(PSO)methodisadoptedaslogiccontrolalgorithm.Thecompensationtimeisabout200ms,thecompensateddifferentialgroupdelay(DGD)isupto30ps,andbiterrorrate(BER)of10^-9isreachedwhenPMDcompensationisemployed.
简介:Anultra-highspeed1:2demultiplexerforopticalfibercommunicationsystemsisdesignedutilizingtheIHP0.25μmSiGeBiCMOStechnology.Thelatchofthedemultiplexercorecircuitisresearched.Basedonthecurrentmeasurementcondition,ahigh-gainandwide-bandwidthclockbufferisdesignedtodrivelargeload.Transmissionlinetheoryforultra-highspeedcircuitsisusedtodesignmatchingnetworktosolvethematchingproblemamongtheinput,outputandinternalsignals.Thetransientanalysisshowsthatthisdemultiplexercandemultiplexone100Gb/sinputintotwo50Gb/soutputs.Thechipareaofitis0.7mm×0.47mm,theinputandoutputdataarebothat400mVP-PPCMLstandardvoltagelevel,andthepowerconsumptionoftheICis900mWatthepowersupplyof-4V.
简介:Aquasi-cycliclow-densityparitycheck(QC-LDPC)codeisconstructedbyanimp
简介:Weexperimentallydemonstrateall-opticalclockrecoveryfor100Gb/sreturn-to-zeroon–offkeyingsignalsbasedonamonolithicdual-modedistributedBraggreflector(DBR)laser,whichcanrealizebothmodespacingandwavelengthtuning.Byusingacoherentinjectionlockingscheme,a100GHzopticalclockcanberecoveredwithatimingjitterof530fs,whichisderivedbyanopticalsamplingoscilloscopefromboththephasenoiseandthepowerfluctuation.Furthermore,fordegradedinjectionsignalswithanopticalsignal-to-noiseratioaslowas4.1dBanda25kmlongdistancetransmission,good-qualityopticalclocksareallsuccessfullyrecovered.